计算机体系结构第五章练习题参考解答(国外英文资料).docVIP

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计算机体系结构第五章练习题参考解答(国外英文资料).doc

计算机体系结构第五章练习题参考解答(国外英文资料)

计算机体系结构第五章练习题参考解答(国外英文资料) Fifth chapters 5.34 in a Cache storage system that uses group associative mapping, the main memory is composed of 8 blocks of B0 to B7, and Cache has 2 groups, each with 2 blocks, each of which has a size of 16B. During the execution of a program, the main memory block addresses for access are: B6, B2, B4, B1, B4, B6, B3, B0, B7, B4, B5, B3. (1) write the format of the main memory address and mark the length of each field. (2) write the format of the Cache address and mark the length of each field. (3) indicate the mapping relation between the main memory and each block of Cache. (4) if Caches 4 block numbers are C0, C1, C2, and C3, list the Cache block address flow during program execution. (5) if FIFO replacement algorithm is adopted, the hit probability of Cache is calculated. (6) if LRU replacement algorithm is adopted, the hit probability of Cache is calculated. (7) if it is a fully associative mapping, do (5) and (6). (8) in the execution of the program, each block is loaded from one main memory to Cache, and the average access to this block is 16 times, and the Cache hit rate in this case is calculated. Solution: (1) (2) when using group associative mapping, the format of main memory and Cache address is respectively: Area code E group G memory group block number B block address W The numbers in the G group, B block w block. Main memory according to the size of the Cache partition, there are 8 main memory block, Cache has 2 x 2=4 blocks, then the main memory is divided into 8/4=2 areas, area code E length of 1 bits. Each district has 2 groups, G group, G is the length of 1 bits. Each block has 2 blocks, and the block numbers B and B are 1 bits in length. Each block has 16 storage characters, so the length of the address W and W in the block is 4 bits. (3) according to the set associative mapping rules, main memory block 0 ~ 7 and 0 ~ 3 Cache block mapping relation is: 0, 1, 4 memory blocks, 5 blocks 0, 1 and Cache between the fully a

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