2mos器件物理基础中国科大.pptVIP

Example : proper layout for small RG Total gate resistance is equal to RG/4 Behave of MOS device as a capacitor VG0, accumulation region Weak inversion region, series combination of Cox and Cdep VGSVTH, then up to Cox 源漏相接,成为二端元件 VD=0 Deriving of capacitances in different regions If the device is off: CGD=CGS=CovW CGB = series combination of WLCox and Cdep. VD0 In deep triode region: CGD=CGS=1/2*WLCox+CovW In saturation region: CGD= CovW CGS=2/3*WLCox+CovW L is the effective length Due to the inversion layer acts as the shield between the gate and bulk, Gate-bulk