- 1、本文档共25页,可阅读全部内容。
- 2、原创力文档(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。
- 3、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载。
- 4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
查看更多
初学PIC的笔记(国外英文资料)
初学PIC的笔记(国外英文资料)
Port analysis:
PORTA (RA0 ~ RA5), PORTB (RB0 ~ RB7), PORTC (RC0 ~ RC7), PORTD (RD0 ~ RD7), and PORTE (RE0 ~ RE2)
Port A: port A is A six two-way port. Direction of the corresponding data register TRISA, TRISA position 1, the corresponding pins into the input, namely the corresponding output drive into a high impedance. For a clear zero of TRISA, the corresponding pins become output.
Reading the port A register reads the state of the pins, whereas the write port is written to the port register. All writes are read and then write. RA4 (T0CKI) RA2 (AN2 / VREF -) RA3 (AN3 / VREF +)
Port B: port B is an 8-bit two-way port. TRISB register, the corresponding data direction will TRISB position 1, the corresponding pins into the input, namely the corresponding output drive into a high impedance. A clear zero of the TRISB, the corresponding pins become the output.
The three pins of PORTB are for low voltage programming. RB2 / PGM, RB6 / PGC and RB7 / PGD are reused.
Each leg of port B has an internal weak pull, and a single control position can open all the weak ones. This can be done with the RBPU (OPTION_REG 7 ). When the port is set to an output, the pull automatically closes automatically. The upper pull cant be used in the last power reset. RB0 / INT is an external interrupt input pin and is set using INTEDG (option 6)
Port C: port A is A six two-way port. Direction of the corresponding data register TRISA, TRISA position 1, the corresponding pins into the input, namely the corresponding output drive into a high impedance. For a clear zero of TRISA, the corresponding pins become output.
Port D: port A is A six two-way port. Direction of the corresponding data register TRISA, TRISA position 1, the corresponding pins into the input, namely the corresponding output drive into a high impedance. For a clear zero of TRISA, the corresponding pins become output.
Timer0:
8 bit timer/counter register; Internal or external clock selection; Interrupt from FFH to 0
文档评论(0)