磐正主板DEBUG侦错等指示信息及其含义（国外英文资料）.docVIP

磐正主板DEBUG侦错等指示信息及其含义（国外英文资料） CF Test the CMOS R/W functionality. C0 Early motherboards set initial values: - disable shadow RAM -disable L2 cache (SURPER 7 architecture and late compatibility architecture) -check the base chipset register. C1 Detection of memory: -auto - detects DRAM (dynamic random access storage) size, type, and ECC. -auto - detects L2 cache (SURPER 7 architecture and later compatible architecture) C3 Mapping the BIOS to DRAM. C5 Allow chipset to copy the BIOS to the address of E000 F000 shadow RAM. 01 Locate the Xgroup encoding in the memory address of 1000 to 0 03 Initialize the Superio (superinput output) _Early (response) _Init (boot) switch. 05 Output blank to screen. Clear CMOS errors. 07 Remove the 8042 interface. Initialize the 8042 interface self-check. 08 Check the special keyboard controller for the Winbond 977 series super I/O (input/output) chips. Allow keyboard interfaces. 0 a Disable the PS / 2 mouse interface. The keyboard and mouse ports are automatically detected when the port and exchange interface is detected. (optional) Reset the keyboard in the discovery model for the Winbond 977 series super I/O input/output chips. 0 e Check the memory address for the F000h segment to prove whether it supports R/W. If the test fails, the box speaker will alert. 10 Automatically detect the FlashROM type to read the appropriate FlashROM R/W encoding. Enter the address bit of the running time and the area for the ESCD and DMI support for F000. 12 Use step 1s to determine the interface of the CMOS circuit. Also set the current status frequency and then check if it exceeds the range. 14 Import the main board program default value into the motherboard. The default value for the motherboard is the MODBINable from the OEM customer. 16 Initializes the Early (response) _ Init (boot) _ (board) _ (board) _ (board) -vibration switch. 18 Check the level of the CPU including the trademark, the SMI type (Cyrix or Intel), and the CPU processor data. (586 o