双D触发器cd4013.pdf

The MC14013B dual type D flip–flop is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each flip–flop has independent Data, (D), Direct Set, (S), Direct Reset, (R), and Clock (C) inputs and complementary outputs (Q and Q). These devices may be used as shift register elements or as type T flip–flops for counter and toggle applications. • Static Operation MARKING • Diode Protection on All Inputs DIAGRAMS • Supply Voltage Range = 3.0 Vdc to 18 Vdc 14 PDIP–14 • Logic Edge–Clocked Flip–Flop Design P SUFFIX MC14013BCP Logic state is retained indefinitely with clock level either high or low; CASE 646 AWLYYWW information is transferred to the output only on the positive–going 1 edge of the clock pulse 14 • Capable of Driving Two Low–power TTL Loads or One Low–power SOIC–14 14013B Schottky TTL Load Over the Rated Temperature Range D SUFFIX AWLYWW • Pin