COA课件18概要1.ppt

Write hit((2) initiating in exclusive snooping in invalid) Write hit((2) initiating in exclusive snooping in exclusive) Write hit((3) initiating in modified snooping in invalid) Write hit((3) initiating in modified snooping in invalid) MESI State Transition(4)—Write Hit Initiating Write Hit (1) Initiating in S , Snooping in S or I (2) Initiating in E , Snooping in I (3) Initiating in M ,Snooping in I Initiating: Snooping: I M E S I M E S (1) (2) (3) (1) MESI State Transition Diagram In multi-processor systems, MESI protocol is used to solve the problem of cache coherence. Describe simply the events when READ MISS and WRITE HIT and Draw the state transition diagram.(12 points) * * * * * * * * * * * * * * * * * * * * * * * * * Solutions Software Solutions Compiler and operating system deal with problem Hardware Solution Cache coherence protocols Directory protocols目录协议 Snoopy protocols 监听协议 Page 657 Snoopy Protocols(1) 监听协议 Two basic approaches to snoopy protocol have been explored： —Write update 写—更新协议 —Write invalidate 写—无效协议 Page 659 Write Invalidate Multiple readers, one writer When a write is required, all other caches of the line are invalidated Writing processor then has exclusive access until line required by another processor Used in Pentium II and PowerPC systems State of every line is marked as Modified, Exclusive, Shared or Invalid MESI 写—无效协议 The MESI Protocol(1) The data cache includes two status bits per tag So each line can be in one of four states： Modified (修改态 ) —The line in the cache has been modified by own’s CPU(different from main memory) and available only in this cache (只有此cache中数据行的有效 ) Exclusive (排他态或专有态 ) —Only the line in the cache is the same as that memory and is not present by any other (只有此cache和memory相同 ) Page 659 The MESI Protocol(2) Shared (共享态 ) —Some caches have the same line data same as memory Invalid (无效态 ) —has not the data in the cache —has