IDT2305时钟缓冲器.pdfVIP

IDT2305 3.3V ZERO DELAY CLOCK BUFFER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 3.3V ZERO DELAY IDT2305 CLOCK BUFFER FEATURES: DESCRIPTION: • Phase-Lock Loop Clock Distribution The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, • 10MHz to 133MHz operating frequency designed to address high-speed clock distribution applications. The zero • Distributes one clock input to one bank of five outputs delay is achieved by aligning the phase between the incoming clock and • Zero Input-Output Delay the output clock, operable within the range of 10 to 133MHz. • Output Skew 250ps The IDT2305 is an 8-pin version of the IDT2309. IDT2305 accepts one • Low jitter 200 ps cycle-to-cycle reference input, and drives out five low skew clocks. The -1H version of this • IDT2305-1 for Standard Drive device operates, up to 133MHz frequency and has a higher drive than the • IDT2305-1H for High Drive -1 device. All parts have on-chip PLLs which lock to an input clock on the • No external RC network required REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT • Operates at 3.3V VDD pad. In the absence of an input clock, the IDT2305 enters power down. In • Power down mode this mode, the device will draw less than