High Frequency VCO Design and Schematics （高频VCO设计和图表）.pdfVIP

High Frequency VCO Design and Schematics Iulian Rosu, YO3DAC / VA3IUL, /va3iul/ This note will review the process by which VCO (Voltage Controlled Oscillator) designers choose their oscillator’s topology and devices based on performance requirements, components types and DC power requirements. Basic oscillator design specifications often require a given output power into a specified load at the design frequency. The drive level and bias current set the fundamental output current and the oscillation frequency is set by the resonator components. Transistor selection of the transistor should consider noise, frequency, and power requirements. Based on the particular device, the design may account for parasitics of the device affecting resonator components as well as nonlinear performance specifications. All the VCO schematics presented below were practical build using the Infineon SiGe transistor BFP420, and any of them can be re-tuned for different frequency ranges changing varicaps and LC tank values. VCO Specifications  The VCO must exhibit a low Phase Noise in order to meet the Sensitivity, Adjacent Channel and Blocking requirements. In digital modulation scheme the VCO’s Phase Noise affects the Bit Error Rate requirements. High Pushing (change of the oscillation frequency with supply voltage) can cause Phase Noise degradation due to increased sensitivity to the power supply noise. Phase Noise varies typically by 3dB with temperature, in the –55ºC to +85ºC range.  A buffer at the output is necessarily to isolate the VCO from any output load variations (Pulling) and to provide the required output power. Meeting simultaneously the output power and load pull specification directly with a stand-alone oscillator would be difficult. However, this