芯片封装概述（Overview of chip packaging）.docVIP

芯片封装概述（Overview of chip packaging） I carefully collated documents, documents from the network I only collect and sort out In case of error Please check it yourself! Overview of chip packaging * * * Abstract: This paper describes the evolution process of chip packaging And take BGA as the key point The advanced area array packaging is introduced Keywords: packaging Assemble Area array package Ball grid array package Introduction With the rapid development of semiconductor technology ICs rapid growth in processing speed Enhancement in processing power The internal structure of the chip is becoming more complex Therefore, IC manufacturing also faces challenges The contradiction between the miniaturization of packaging and the increase of the number of I / 0 terminals promotes the innovation of packaging Evolution of L. packaging form 1.1 dual in line package DIP (Dual, In-line, Package) Traditional chips are restricted by many factors, such as process, function and so on Packaged in DIP form Some even use SIP (Single, In-line, Package) packaging Compared with the use of SMD, such assembly occupies a larger area It is difficult for equipment to be miniaturized And assembly automation is low 64 pin DIP package IC The mounting area is 25.4mm*76.2mm The same number of terminals with pin center distance of 0.64mm, no lead devices for surface mounting The mounting area is 12.7mm*12.7mm Only L / 12 of the former 1.2 SMT commonly used package 1.2.1 small outline package SOP (Small, Outline, Package) The SOP device is also called SOIC (Small Outline Integrated Circuit) Is the reduced form of DIP The center distance of the lead is 1.27mm Pin form: European wing type, J type, I type Common European wing type 1.2.2 plastic leaded chip carrier PLCC (Plastic, Leaded, Chip, Carrier) Plastic leaded chip carrier PLCC The center distance of the lead is 1.27mm The leads are J shaped Bend to the lower part of the device There are two kinds of rectangle and square The assembly area of PLCC