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lvds接口定义及原理知识(The LVDS interface definition and principle of knowledge)
lvds接口定义及原理知识(The LVDS interface definition and principle of knowledge)
LVDS interface definition
Author: bechade update time: 2007-9-22 7:31:10 article entry: chfygl
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20PIN single 6 definition:
1: power 2: power 3: ground 4: ground 5:R0- 6:R0+ 7: ground 8:R1- 9:R1+ 10: ground 11:R2- 12:R2+ 13: ground 14:CLK-, 15:CLK+ 16 empty, 17 empty, 18 empty, 19 empty, 20 empty
The resistance between each signal line is (digital table 120 or so)
20PIN double 6 definition:
1: power 2: power 3: Ground: ground 5:R0- 6:R0+ 7:R1- 8:R1+ 10:R2+ 9:R2- 11:CLK- 12:CLK+ 13:RO1- 14:RO1+ 15:RO2- 16:RO2+ 17:RO3- 18:RO3+
19:CLK1- 20:CLK1+
The resistance between each signal line is (digital table 120 or so)
20PIN single 8 definition:
1: power 2: power 3: ground 4: ground 5:R0- 6:R0+ 7: ground 8:R1- 9:R1+ 10: ground 11:R2- 12:R2+ 13: ground 14:CLK-, 15:CLK+, 16:R3-, 17:R3+
The resistance between each signal line is (digital table 120 or so)
30PIN single 6 definition:
1: 2: 3: power supply: 4: 6: 5 empty empty empty empty 8:R0- 7: 9:R0+ 10: 11:R1- 12:R1+ 13: 14:R2- 15:R2+ 16: 17:CLK- 18:CLK+ 19: 20: 21: 22: - empty empty empty empty empty 23: 24: 25: 26: 27 empty empty 28: 29 30 empty empty empty empty
The resistance between each signal line is (digital table 120 or so)
30PIN single 8 definition:
1: 2: 3: power supply: 4: 6: 5 empty empty empty empty 8:R0- 7: 9:R0+ 10: 11:R1- 12:R1+ 13: 14:R2- 15:R2+ 16: 17:CLK- 18:CLK+ 19: 20:R3- 21:R3+ 22: 23: 24: 25: empty empty empty empty empty 26: 27: 28 29 30 empty empty
The resistance between each signal line is (digital table 120 or so)
30PIN double 6 definition:
1: 2: 3: power supply: 4 5:R0- 6:R0+ 7: 8:R1- 9:R1+ 10: 11:R2- 12:R2+ 13: 14:CLK- 15:CLK+ 16: 17:RS0- 18:RS0+ 19: 20:RS1- 21:RS1+ 22: 23:RS2- 25: 24:RS2+ 26:CLK2- 27:CLK2+
The resistance between each signal line is (digital table 120 or so)
30PIN double 8 definition:
1: 2: 3: power supply power supply: 4: 6: 5 empty
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