cmos image sensor with on-chip image compression a review and performance analysiscmos图像传感器芯片上的图像压缩审查和性能分析.pdfVIP

Hindawi Publishing Corporation Journal of Sensors Volume 2010, Article ID 920693, 17 pages doi:10.1155/2010/920693 Review Article CMOS Image Sensor with On-Chip Image Compression: A Review and Performance Analysis Milin Zhang and Amine Bermak Smart Sensory Integrated Systems (S2IS) Lab, Electronic and Computer Engineering Department, Hong Kong University of Science and Technology, Kowloon, Hong Kong Correspondence should be addressed to Milin Zhang, zhangmilin@ Received 4 May 2010; Revised 16 August 2010; Accepted 21 September 2010 Academic Editor: Isao Takayanagi Copyright © 2010 M. Zhang and A. Bermak. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Demand for high-resolution, low-power sensing devices with integrated image processing capabilities, especially compression capability, is increasing. CMOS technology enables the integration of image sensing and image processing, making it possible to improve the overall system performance. This paper reviews the current state of the art in CMOS image sensors featuring on-chip image compression. Firstly, typical sensing systems consisting of separate image-capturing unit and image-compression processing unit are reviewed, followed by systems that integrate focal-plane compression. The paper also provides a thorough review of a new design paradigm, in which image compression is performed during the image-capture phase prior to storage, referred to as compressive acquisition. High-performance sensor systems reported in recent years are also introduced. Performance analysis and comparison of the reported designs using different design paradigm are pres