历年真题《微型计算机接口技术》2009.01（Over the years Microcomputer Interface Technology 2009.01）.docVIP

下载本文档

2
0
约7.2千字
约 11页
2017-09-01 发布于河南
举报
版权申诉

历年真题《微型计算机接口技术》2009.01（Over the years Microcomputer Interface Technology 2009.01）.doc

1、原创力文档（book118）网站文档一经付费（服务费），不意味着购买了该文档的版权，仅供个人/单位学习、研究之用，不得用于商业用途，未经授权，严禁复制、发行、汇编、翻译或者网络传播等，侵权必究。。
2、本站所有内容均由合作方或网友上传，本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺！文档内容仅供研究参考，付费前请自行鉴别。如您付费，意味着您自己接受本站规则且自行承担风险，本站不退款、不进行额外附加服务；查看《如何避免下载的几个坑》。如果您已付费下载过本站文档，您可以点击这里二次下载。
3、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等，请点击“版权申诉”（推荐），也可以打举报电话：400-050-0827(电话支持时间：9:00-18:30)。
4、该文档为VIP文档，如果想要下载，成为VIP会员后，下载免费。
5、成为VIP后，下载本文档将扣除1次下载权益。下载后，不支持退款、换文档。如有疑问请联系我们。
6、成为VIP后，您将拥有八大权益，权益包括：VIP文档下载权益、阅读免打扰、文档格式转换、高级专利检索、专属身份标志、高级客服、多端互通、版权登记。
7、VIP文档为合作方或网友上传，每下载1次，网站将根据用户上传文档的质量评分、类型等，对文档贡献者给予高额补贴、流量扶持。如果你也想贡献VIP文档。上传文档

历年真题《微型计算机接口技术》2009.01（Over the years Microcomputer Interface Technology 2009.01）

历年真题《微型计算机接口技术》2009.01（Over the years Microcomputer Interface Technology 2009.01） January 2009 national higher education self study examination Principles and applications of Microcomputer Course Code: 02277 A single choice (the title of 20 items, each item of 1 points, a total of 20 points) In the four option of each item listed in only one is in line with the requirements of the subject. Please fill in the brackets behind the questions. The wrong choice or not, choose no points. In 1.8086CPU systems, the maximum memory capacity is () A.1024B B.1024KB C.1024MB D.1024GB 2. the execution of each instruction consists of operations such as fetch, decode, and execute. The time required to execute an instruction is called () A. instruction cycle B. bus cycle C. clock cycle D.CPU cycles The A19/S6~A16/S3 pin of the 3.8086 microprocessor is () A. data bus B. address bus C. address / data bus D. address / status bus 4. when the zero flag ZF=l, means () The A. operation results in 1 B., and the result is 0 The result of C. operation is not 0 D., and the result is all l 5. in stack operations, the generic register that it implicitly uses is () A.AX B.BX C.BP D.SP The 6. instruction JMP DWORD PTR[BX][SI] is addressed as () Indirect transfer addressing in A. segment direct transfer addressing B. segment Indirect transfer addressing between segments of D. direct transfer addressing C. 7. after the following instructions are executed, the (BX) =0 can be made, and the instructions of the CF=0 and OF=0 are also () A.OR, BX, BX, B.XOR, BX, BX C.AND, BX, BX, D.TEST, BX, 0FFFFH When the 8. read-only memory chip writes the contents, it is possible to clear it with an electrical signal A.ROM B.PROM C.EPROM D.E2PROM The 9.I / O port operates in an independent addressing mode A. and memory share the same address space B. read and write operations are implemented by hardware signals and C. accesses with the MOV command D. is accessed with dedicated I / O instructions 10. interrupt vector t