基于高效抽取滤波器的数字下变频设计.pdfVIP

34 6 ( ) ol. 34 No.6 2006 6 J. Huazhong Univ. of Sci. Tech. ( Nature Science Edition) Jun. 2006 杨 灵 吴黎晖 张蕴玉 ( 华中科技大学 电子与信息工程系, 湖北武汉430074) : ,, , ., , ,. ALTREA ,,. . FPGA . : ; ; ; ; ; : T N830.2 : A : 1671-4512( 2006)06-0014-04 Scheme for di gital down converter based on decimation filters with high eff iciency Yang L ing W u L ihui Zhang Yuny u Abstract: T he paper carried out a research on the structure and the theory of DDCcs each module, and put forward a schemeof realizing DDCwith high efficiency decimation filters. Look-up tablewas used to realize the digital high sampling ratelocal oscillator, and CIC (cascadeontegrator comb) filters and HB (Half-Banol) filters were used to realizethe decimation of DDC. Look-up tablewas used for many times in the scheme. Compared with traditional methods, Look-up table has the advantage of resource saving, high speed and the easy realization. T he design used library of parameterized modules of ALTREA, which made the most of the chipcs hardware resource, thereby improved the speed. A de- sign instance of HB filter was also given. It has been demonstrated with FPGA. Key words: digital down converter( DDC) ; field programmable gate anry(FPGA) ; digital local oscilla- tor; cascade integrator comb filter; half-band filter; look-up table Yang Ling Assoc. Prof.; Dept. of Electronics and Information Eng., Huazhong Univ. of Sci. T ech. Wuhan 430074, China. (Digital Down Converter, DDC) . 1 DDC GrayChip DDC , DDC . DDC : , , . ,DDC (Num