数字逻辑chapter6_c.pptVIP

Full Adder Adding two single-bit binary values X, Y , with a carry input bit C-in, produces a sum bit S and a carry out C-out bit. X 0 0 0 0 1 1 1 1 Y 0 0 1 1 0 0 1 1 S 0 1 1 0 1 0 0 1 C-out 0 0 0 1 0 1 1 1 C-in 0 1 0 1 0 1 0 1 S(X,Y, C-in) = S (1,2,4,7) C-out(x, y, C-in) = S (3,5,6,7) Inputs Outputs Sum S C-in X 0 1 00 01 11 10 Y C-in XY 0 1 2 3 6 7 4 5 1 1 1 1 C-in X 0 1 00 01 11 10 Y C-in XY 0 1 2 3 6 7 4 5 1 1 1 1 Carry C-out S = X’Y’(C-in) + XY’(C-in)’ + XY’(C-in)’ + XY(C-in) S = X ? Y ? (C-in) C-out = XY + X(C-in) + Y(C-in) Full Adder Proving for S = X ? Y ? (C-in) : S = X’Y’(C-in) + XY’(C-in)’ + XY’(C-in)’ + XY(C-in) = X’Y’(C-in) + XY(C-in) + XY’(C-in)’ + XY’(C-in)’ = (X’Y’ + XY)(C-in) + (XY’+ XY’)(C-in)’ = (X’ + Y)(X + Y’)(C-in) + (X ? Y)(C-in)’ = (XY’ +X’Y)’ (C-in) + (X ? Y)(C-in)’ = (X ? Y)’ (C-in) + (X ? Y)(C-in)’ = X ? Y ? (C-in) Full Adder Circuit Using AND-OR XY YC-in C-out XC-in X X Y C-in Y C-in Y Y’ Y X X’ X C-in C-in’ C-in X’Y’C-in XY’C-in’ Sum S X’YC-in’ XYC-in X’ X’ X X Y’ Y Y’ C-in Y C-in’ C-in’ C-in’ Full Adder X Y S C-in C-out Full Adder Circuit Using XOR Full Adder X Y S C-in C-out XY YC-in C-out XC-in X X Y C-in Y C-in Sum S X Y C-in * * * * * * * * * * * * * Number of variables equal to number of address Transform the logic function The output function expression of 8-1 multiplexer is： Explanation：determine the address and input Comparing the 2 expressions, we know: D0=0 D1=0 D2=0 D3=1 D4=0 D5=1 D6=1 D7=1 If the number of variables is greater than number of address Implement logic function using Multiplexers (continue) The output function expression of 8-1 multiplexer is： Comparing expressions Comparing the 2 expressions, let BCD as address, and ： D0=1 D1=0 D2=A D3=1 D4=0 D5=1 D6=A D7=