Chapter 6 TMS320C54x and C55x Interrupt Management TI C5000官方课件.pptVIP

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Chapter 6 TMS320C54x and C55x Interrupt Management TI C5000官方课件.ppt

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Chapter 6 TMS320C54x and C55x Interrupt Management TI C5000官方课件

Copyright ? 2003 Texas Instruments. All rights reserved. DSP C5000 Chapter 6 TMS320C54x and C55xInterrupt Management Managing Interrupts Objectives Interrupt Timeline 1. C5409 Interrupt Locations 2. Creating VECTORS.ASM 3. Enable Individual Interrupts 4. Enable Global Interrupts (INTM) 5. C5409 External Interrupt Pins/Signals 4 maskable external interrupts (INT0-3) 2 non-maskable external interrupts (NMI, RESET) Interrupt acknowledge (IACK) 5. C5409 Internal Interrupt Signals Software RESET does not set IPTR to 1FFh McBSP channel 0 rcv xmit McBSP channels 1 2 rcv xmit shared with DMA channels 0 - 3 DMA channels 4 5 Host Port Interface Timer Recognizing Interrupts Pending Interrupts Post Interrupt Hardware Sequence Context Save Restore Instructions Return Instructions What’s Missing? Nested Interrupts Relocating the Vector Table Software Interrupts Hardware Reset Interrupts in a Far Environment Questions Answers LAB - Managing Interrupts LAB.ASM – Solution 1 of 3 LAB.ASM - Solution 2 of 3 LAB.ASM - Solution 3 of 3 VECTORS.ASM - Solution C54 Interrupt Complete End of C54x Interrupt management study Objectives Interrupt Timeline C5510 Interrupt Sources Creating VECTORS.ASM Enable Individual Interrupts (IER0/1) Enable Global Interrupts (INTM) C5510 External Interrupt Pins/Signals 6 maskable external interrupts (INT0-5) 2 non-maskable external interrupts (NMI, RESET) Interrupt acknowledge (IACK) Recognizing Interrupts Interrupt Flag Register (IFR0/1) Post Interrupt Hardware Sequence View of Stacks Before ISR Context Save Restore Instructions Return From ISR Objectives What Happens When Reset Occurs ? Relocating the Vector Table Interrupt “Priority” Review Review LAB - Managing Interrupts LAB.ASM – Solution 1 of 3 LAB.ASM – Solution 2 of 3 LAB.ASM – Solution 3 of 3 INT.ASM - Solution INT2.DAT Other Interrupt Issues Nested Interrupts NMI Interrupt Nesting Interrupts There are cases when nesting of interrupts is required. When performing nested inter