I2C课件.pptVIP

outline void Write8Bit(uchar n) //写一个字节数据子程序,n为待发送的数据 { uchar i; for(i=8;i0;i--) { SDA=(bit)(n0x80); SCL=1; DELAY5US SCL=0; SDA=0; n=n1; } } uchar Read8Bit(void) //读一个字节数据子程序 { uchar temp,rbyte=0; for(temp=8;temp0;temp--) { SDA=1; SCL=1; _nop_(); //短延时 rbyte=rbyte1; rbyte=rbyte|((uchar)(SDA)); SCL=0; } return(rbyte); } Thank You! Professional Wireless Solution Provider Quectel Wireless Solutions Specification and application of I2C interface Ray xu 2011.6.24 Feature General concept and advantage Bit Transfer Transferring data Synchronization Arbitration clock synchronizing as a handshake Hs-MODE Serial data transfer format in Hs-mode Electrical specifications and timing for I/O stages and bus lines Maximum and minimum values of resistors Rp and Rs for Standard-mode I2C-bus devices Wiring pattern of the bus lines Connecting devices with different logic levels Example of simulation I2C feature Only two bus lines are required; a serial data line (SDA) and a serial clock line (SCL) Each device connected to the bus is software addressable by a unique address; masters can operate as master-transmitters or as master-receivers It’s a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer Serial, 8-bit , bi-directional data transfers can be made at up to 100 kbit/s in the Standard-mode, up to 400 kbit/s in the Fast-mode, or up to 3.4 Mbit/s in the High-speed mode The number of ICs that can be connected to the same bus is limited only by a maximum bus capacitance of 400 pF. General concept and advantage Extremely low current consumption High noise immunity Wide supply voltage range Wide operating temperature range. The I2C-bus supports any IC fabrication process (NMOS, CMOS, bipolar). Two wires, serial data (SDA) and serial clock (SCL), carry information between the devices connected to th