HardwareModelingOverview教学幻灯片讲义.ppt

Hardware Modeling Overview;;What is VHDL?;VHDL History and Purpose;IEEE 1076(Modeling);IEEE 1076(Modeling);Formalization of VHDL;Fewer details, faster design entry and simulation; Overlapping HDL Levels; HDL Description Levels ;;Knowledge Check;;Summary;VHDL Language Concepts;Objectives;Outline;VHDL is composed of design unitsThese are the basic building blocks of which all source code, behavioral, RTL, or structural code is comprisedSome design units are primary, while others are secondary (dependent). No secondary design unit can exist standalone;entity HALF_ADD is port (A, B : i