官方说明书ST 74V2T03 数据手册.pdfVIP

ST 74V2T03 handbook /file/2714047 From ManualL ManualL collects and classifies the global product instrunction manuals to help users access anytime and anywhere, helping users make better use of products. Home: / Chinese: / This Manual: /file/2714047 查询74V2T03供应商 74V2T03 DUAL 2-INPUT OPEN DRAIN NAND GATE HIGH SPEED: tPD = 5.4ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS OPERATING VOLTAGE RANGE: SOT23-8L VCC(OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY ORDER CODES DESCRIPTION PACKAGE T R The 74V2T03 is an advanced high-speed CMOS SOT23-8L 74V2T03STR DUAL 2-INPUT OPEN DRAIN NAND GATE fabricated with sub-micron silicon gate and can also be used as a led driver in any other double-layer metal wiring C2MOS technology. application requiring current sink. The internal circuit is composed of 3 stages Power down protection is provided on all inputs including buffer output, which provide high noise and 0 to 7V can be accepted on inputs with no immunity and stable output. regard to the supply voltage. Th