基于自隔离技术的可集成soi高压(600v)器件研究-软件工程专业论文.docxVIP

摘要摘要SOI(Silicon OnInsulator)技术具有低泄漏电流、低功耗、高速、低串扰和宽安 全工作区等优点而在功率集成电路(PowerIntegratedCircuits,PICs)应用中备受关 注。PICs 的关键技术在于实现功率器件耐高压和低压控制电路与功率器件之间的 有效隔离。通过理论和实验，本文对P型SOI层上的与高压集成电路(HVIC)兼容的N 沟道LDMOS新器件进行数值仿真和实验研究。该器件的特点是在埋氧层(BOX) 上界面引入埋N岛或N层。根据泊松方程，N岛或N层中的施主离子增强SOI 层下界面的电场，从而增大埋氧层的电场，导致击穿电压提高。与P型常规SOI 相比，埋N岛SOI器件耐压由487V提升至690V。另外，在HVIC 中，该器件与 低压电路单元实现自隔离，避免工艺复杂、高成本的深槽介质隔离。通过仿真，本文仿真分析了器件结构参数对击穿电压的影响。同时，采用工 艺仿真软件Tsuprem4优化了工艺参数。在顶层硅厚20μm，埋氧层厚4μm 的SOI 材料上，研制出耐压达660V的基于自隔离技术的可集成的高压LDMOS。最后， 本文对工艺仿真软件Tsuprem4 进行了介绍。关键词：SOI，自隔离，电离施主，电场，击穿电压ABSTRACTABSTRACTTheSilicon-on-Insulator(SOI)technologyofferslowleakage,lowpower consumption,highspeed,lowcross-talkandwidersafeoperatingarea.Ithasattracteda lotofattentionforuseinPowerIntegratedCircuits(PICs).InPICs,thekey technolygiesareahighbreakdownvoltageofPowerdevicesandtheeffectiveisolation between the Power devices and the low voltagecontrol circuits.Inthisthesisanovelhighvoltagen-channelLDMOScompatiblewithhigh-voltage integratedcircuit(HVIC)isinvestigatedtheoreticallyandexperimentallyonthep-type silicon-on-insulator(SOI)layer.Thedeviceischaracterizedbytheburiedn-islandsor then-layeronburiedoxidelayer(BOX).AccordingtoPossionEquation,theionized donorsinn-islandsorthen-layerenhancethebottom-interfaceelectricfieldoftheSOI layer,andthusincreasesEI,resultinginanenhancementofthebreakdownvoltage.ComparedwiththeconventionalP-typeSOI,thebreakdownvoltageoftheimplantedn-typedriftregionon p-typeSOIlayerisincreasedfrom487Vtoover690V.Inaddition, theself-isolationbetweenthepowerdeviceandlowvoltagecircuitcellisrealizedin HVIC,avoidingthedielectricisolationusingdeeptrenches,ofwhichtheprocessis difficult and cost.Theinfluenceofstructureparametersonthebreakdownvoltageisdiscussedby simulation,andtheprocessconditionisoptimizedbythesimulatorTsuprem4.A660V SOILDMOSinaself-isolationSOIHVICisrealizedona20μmSOIlayerover4μm BOX.Finally,thesoftwareofTsuprem4usedinprocesssimulationisintroducedinthis thesis.Keywords:SOI, self-isolation, ionized donors,electric, bre