电子系统故障诊断与测试性课程的设计.docx

电子系统故障诊断与测试性课程设计学生姓名学　　号专　　业测控技术与仪器1.模拟/混合+电路)*（诊断+测试性/可测性）；文献来源： IEEE期刊论文或国外专利。每人选一篇，不要重复。DFT for Analog and Mixed Signal IC Based on IDDQ Scanning基于IDDQ扫描的模拟和混合集成电路可测性设计Abstract—The cost of integrated circuits increases with the complexity and integration density. This has led designers to consider testing from the design phase; that’s what we call DFT(design for testability). In this paper, we propose a DFT solution,based on technique of IDDQ measuring current, by incorporating a Built-In Current sensor, whose function is to detect power consumption of different circuits under test, and by applying an intelligent switching technique, between BICS and the circuits under test. This DFT technique is intended for digital, analog and mixed integrated circuits. The final system represented, by the name of the TEST AND CONTROL UNIT, consists on a test vector generator, an interconnection logic block, a BICS and a diagnostic unit, designed to test all circuits of the wafer by using a single BICS. The aim of system is to reduce the time required for functionality test of each circuit in the mass production. It offers a practical test solution for integrated circuits designers.摘要-集成电路的成本随着电路的复杂性和集成度的增加而增加。这导致了设计者在设计阶段考虑测试问题，这就是我们所说的DFT（可测试性设计）。在本文中，我们提出了一个DFT的解决方案，它基于IDDQ测量电流的技术，通过内置电流传感器，其功能是测试不同功耗的电路，BICS和被测电路之间应用一个智能开关技术。这DFT技术用于数字，模拟和混合集成电路测试。最终的系统被称为测试和控制单元，包括一个测试向量生成器，互连逻辑块，一个BICS和诊断单元，旨在通过使用一个单一的BICS测试所有电路。系统的目的是降低在大规模生产所需的每个电路的功能测试的时间。它为集成电路设计提供了一个实用的测试解决方案。2. 实现多信号模型实时诊断算法，C语言或Matlab皆可以，并以下面某系统依赖矩阵进行测试验证。附一：实时诊断被测电路图2-1分压电路表2-1优化后的故障源-测试依赖矩阵报警情况：虚拟测试中t13和t32发生报警，其他的几个虚拟测试不发生报警。首先，除开报警点以外分析：虚拟测试中不发生报警的测试点说明对应测试单元正常，即可检查出R8、R7、R6、R5、R4、R2、R1为正常；其次，对报警点分析，虚拟测试中发生报警的测试点对应测试单元不正常，即可检查出R3为故障点。可得源程序如下：#includestdio.hvoid main(void){int i,j,a=3,b=7; //a,b:报警int A[7]={0,0,0,0,0,0,0},B[7]={0,0,0,0,0,0,0},int ARRAY[7][9]={{0,0,0,0,1,0,0,0,1},{0,1,0,0,0,0,0,1,0},{0,0,0,1,0,0,0,1,0},{0,0,0,1,0,0,1,0,0},{1,0,0,0,0,1,0,0,0},{0,0,1,0,0,1,0,0,0},{0,0,0,1,0,1,0,0,0}}; //判