Logic Gate Input Expasion逻辑门的输入扩展.docVIP

Digital Logic for Computers (ACOE161) Experiment #2 Logic Gate Input Expansion – Pre-Lab Report Student’s Name: Reg. no.: Semester: Spring 2010 Date: 06 April 2010 Assessment: Assessment Point Weight Grade Methodology and correctness of results Discussion of results Participation Assessment Points’ Grade: Comments: Experiment #2: Logic Gate Input Expansion Objectives: The objectives of this experiment are to: Investigate how a logic gate with many inputs can be implemented using gates with less inputs, Examine how to handle unused inputs of logic gates. Discussion: The basic logic gates found in integrated circuits have a limited small number of inputs, usually two, three or four. In many applications there is a need for logic gates with more inputs. A number of logic gates can be combined to form a logic gate with more inputs. Figure 1b shows how a 3-input AND gate can be implemented using two 2-input AND gates. Figure 1c and 1d show how a 4-input AND gate can be implemented using three 2-input AND gates. Figure 1f shows how a 3-input OR gate can be implemented using two 2-input OR gates. Figure 1g and 1h show how a 4-input OR gate can be implemented using three 2-input OR gates. Figure 1. Logic Gate Input Expansion. In many applications there are gates available with more inputs that the required ones. The extra inputs must be connected in such a way not to change the function of the logic gate. The unused inputs are usually connected directly to logic 1, a logic 0, or to another input of the same gate. Figure 2 below shows how the unused inputs of logic gates can be connected.  Figure 2. Unused inputs of logic gates. Procedure: Use MULTISIM or Electronics Workbench (EWB) to solve the following exercises. Exercise 1: Open MULTISIM or Electronics Workbench (EWB) and place the AND gate components by clicking on the corresponding gate icon to create the circuit of Figure 1b, as shown in Figure 3. Figure 3. Three-input AND gate using