CMOS运算放大器图设计毕业设计.docVIP

摘 要集成电路掩膜版图设计是实现电路制造所必不可少的设计环节，它不仅关系到集成电路的功能是否正确，而且也会极大程度地影响集成电路的性能、成本与功耗。本文依据基本CMOS集成运算放大电路的设计指标及电路特点，绘制了基本电路图，通过Spectre进行仿真分析，得出性能指标与格元器件参数之间的关系，据此设计出各元件的版图几何尺寸以及工艺参数，建立出从性能指标到版图设计的优化路径。运算放大器的版图设计，是模拟集成电路版图设计的典型，利用Spectre对设计初稿加以模拟，然后对不符合设计目标的参数加以修改，重复这一过程，最终得到优化设计方案。最后根据参数尺寸等完成了放大器的版图设计以及版图的DRC、LVS验证。关键词：集成电路，运算放大器，版图设计，仿真ABSTRACTIntegrated circuit layout design is an essential design part to realize circuit mask manufacturing, it is not only related to the integrated circuit to function correctly, but also can greatly affect the performance of the integrated circuit, the cost and the power consumption.Based on the basic CMOS integrated operational amplifier circuit characteristic and design target, we have rendered the basic circuit diagram, and simulation by Spectre, the simulated results are derived parameters and their relationship between determining factors, thereby defining a line with the design target domain size and processing parameters, finally we builded an optimization from the performance index to layout design .Operational amplifier IC layout design, is the design model of analog integrated circuit layout . Here we used Spectre to design draft which should be simulated, then modified which do not comply with the design goals of the parameters , repeat the process, and finally get the optimization design scheme. Finally, according to the parameters such as size finished the amplifier layout design and the DRC, LVS verification.KET WORDS: Integrated circuit, Operational amplifier, layout design, Simulation目 录 HYPERLINK \l _Toc6731 前 言 5TOC \o 1-3 \h \u HYPERLINK \l _Toc3314 第1章 绪论 PAGEREF _Toc3314 6 HYPERLINK \l _Toc21941 1.1 课题背景 PAGEREF _Toc21941 6 HYPERLINK \l _Toc28490 1.1.1 研究背景 PAGEREF _Toc28490 6 HYPERLINK \l _Toc5409 1.1.2研究内容 PAGEREF _Toc5409 7 HYPERLINK \l _Toc8520 1.2 电路设计流程 PAGEREF _Toc8520 8 HYPERLINK \l _Toc17280 1.3 主要工作以及任务分配 PAGEREF _Toc17280 10 HYPERLINK \l _Toc2500 1.3.1主要工作 PAGEREF _Toc2500 10 HYPERLINK \l _Toc27999 1.3.