基于形态学与线性规划方法的成品率增强方法.docVIP

PAGE \* MERGEFORMAT ii 目 录摘 要ABSTRACT摘 要随着集成电路( IC) 技术的不断发展, 尤其是进入亚微米和深亚微米工艺阶段, 保持或提高集成电路的成品率已成为IC 制造中的关键问题. 然而, 由于集成电路生产工艺中的扰动, 在制造过程特别是在光刻工艺中, 圆片上不可避免地会产生缺陷(实际产生的图形与理想图形之间的偏差) , 由于这些缺陷的存在，就会引起电路发生故障，我们把电路中这些缺陷引起电路故障的区域称之为关键面积，关键面积的大小直接影响到芯片的成品率，因此我们要通过各种方法来使关键面积最小从而使得成品率最优。本文采用形态学和线性规划的方法来处理关键面积。数学形态学在图像处理方面有很多优点，通过对版图的处理，建立线性规划模型，然后再通过MATLAB得到最优解，进而得出最小关键面积。。该方法的优点是把求关键面积问题转化为数学问题，使问题更精确化，为成品率的优化提供了一条新途径。关键词：关键面积 形态学 线性规划 成品率 缺陷ABSTRACTABSTRACTWith the integrated circuit (IC) technology continues to develop, in particular to sub-micron and deep sub-micron process stage, to maintain or increase the yield of integrated circuits IC manufacturing has become the crucial issue in However, due to the production of integrated circuits The disturbances, particularly in the manufacturing process in the lithography process, the wafer inevitably will introduce defects, As a result of the existence of these flaw, they will cause a fault circuit ,in the circuit we call the region which caused fault by the flaw it the critical area ,the size of critical area immediately influence to the yield on the chip, therefore we must try our best to find any methods to minimize the critical area for yield optimization.This paper uses linear programming approach to critical areas。we can get Minimum critical area from matlab。The main advantages of this method are that it can transform a critical area problem into a mathematical problem and make the problem more specific，thus offering a new approach to yield optimization．Keyword: critical area Linear Programming(LP) yield defect目 录 PAGE \* MERGEFORMAT i目 录 TOC \o 1-3 \h \z \u HYPERLINK \l _Toc263843379 目 录 PAGEREF _Toc263843379 \h i HYPERLINK \l _Toc263843380 第一章 绪论 PAGEREF _Toc263843380 \h 1 HYPERLINK \l _Toc263843381 第二章 集成电路 PAGEREF _Toc263843381 \h 3 HYPERLINK \l _Toc263843382 2.1 集成电路现状与发展前景 PAGEREF _Toc263843382 \h 3 HYPERLINK \l _Toc263843383