【毕业论文】ARM_Cortex-M0_嵌入式微处理器中断控制系统研究.doc

河南城建学院本科毕业设计（论文） 摘要 I 摘 要 本文介绍了ARM Cortex-M0嵌入式微处理器中断控制系统的设计。Cortex-M0是ARM公司开发的一款提供超低功耗、低成本微处理器，采用独特的中断控制系统，能够有效加速中断响应过程。通过对M0处理器的中断控制系统研究，可以更深入的了解微处理器架构以及中断控制系统设计。 本文首先简述了嵌入式系统的结构、现状以及发展趋势，然后解释了中断和中断嵌套优先级的概念，重点介绍了ARM Cortex-M0的结构特点，总结了M0异常和中断的特点，并对M0的中断优先级、嵌套向量中断控制器(NVIC)和ARM Cortex微控制器软件接口标准(CMSIS)作说明，最后在ALTERA DE2-115上用按键边沿触发中断，通过观察LED的闪烁状态来验证编写的中断控制程序。 关键词：ARM Cortex-M0，中断，NVIC = 2 \* ROMAN II ABSTRACT This article describes the ARM Cortex-M0 embedded microprocessor interrupt control system design. ARM Cortex-M0 is the development of a company to provide ultra-low-power, low-cost microprocessors, using a unique interrupt control system that can effectively accelerate the process interrupt response. By M0 processors interrupt control system can be more in-depth understanding of microprocessor architecture and interrupt control system design. This paper outlines the structure of the embedded system, status quo and development trends, then explained the priority of interrupts and interrupt nesting concept, focusing on the ARM Cortex-M0 structural characteristics, summarized M0 exception and interrupt characteristics, and the interrupt priority for M0, nested Vectored Interrupt controller (NVIC) and the ARM Cortex microcontroller Software Interface Standard (CMSIS) for illustration, the last in ALTERA DE2-115 with the keypad on edge-triggered interrupts, by observing the status LED flashing to verify that implements interrupt control. Keywords: ARM Cortex-M0, interrupt, NVIC PAGE \* MERGEFORMATIII 目 录 TOC \o 1-3 \h \z \u HYPERLINK \l _Toc359337053 摘 要 I HYPERLINK \l _Toc359337054 ABSTRACT II HYPERLINK \l _Toc359337056 1 绪论 PAGEREF _Toc359337056 \h 1 HYPERLINK \l _Toc359337057 1.1 研究背景 PAGEREF _Toc359337057 \h 1 HYPERLINK \l _Toc359337058 1.2 研究内容 PAGEREF _Toc359337058 \h 1 HYPERLINK \l _Toc359337059 1.3 研究成果 PAGEREF _Toc359337059 \h 1 HYPERLINK \l _Toc359337060 1.4 论文结构 PAGEREF _Toc359337060 \h