高等计算机系结构.pptVIP

* * * * * * * * * * * * * * * * * * 1st generation Latency 1/2 but Clock rate 3X and IPC is 3X Now move to other 1/2 of industry * * * * * Intuitive Model by Mark Hill * * * * Ask which affected? Block size 1) Compulsory 2) More subtle, will change mapping * * * * * * * * * * * * * * * * * * * * * * 总 结 3 Cs: Compulsory, Capacity, Conflict 降低失效率 1. 通过增大块大小减少失效 2.通过增大相联度减少失效 3.通过Victim Cache减少失效 4.通过伪-相联减少失效 5.通过硬件预取指令或数据减少失效 6.通过软件预取数据减少失效 7.通过编译优化减少失效 注意：在评价性能时仅仅侧重于某一个参数是危险的 改进cache性能（续） Average Memory access time = Hit time + Miss rate ? Miss penalty 1. 降低失效率 2. 降低失效损失，或者 3. 减少在cache中命中的时间 1. 减少失效损失: 在失效时读比写优先 Write through with write buffers offer RAW conflicts with main memory reads on cache misses If simply wait for write buffer to empty, might increase read miss penalty (old MIPS 1000 by 50% ) Check write buffer contents before read; if no conflicts, let the memory access continue Write Back? Read miss replacing dirty block Normal: Write dirty block to memory, and then do the read Instead copy the dirty block to a write buffer, then do the read, and then do the write CPU stall less since restarts as soon as do read 1.1 在失效时读比写优先 1.2 Merging Write Buffer write buffer CPU in out DRAM (or lower mem) Write Buffer 2. 减少失效损失: 子块放置 Don’t have to load full block on a miss Have valid bits per subblock to indicate valid (Originally invented to reduce tag storage) Valid Bits Subblocks 3. 减少失效损失: 提前重启和关键字先送 Don’t wait for full block to be loaded before restarting CPU Early restartAs soon as the requested word of the block arrives, send it to the CPU and let the CPU continue execution Critical Word FirstRequest the missed word first from memory and send it to the CPU as soon as it arrives; let the CPU continue execution while filling the rest of the words in the block. Also called wrapped fetch and requested word first Generally useful only in large blocks, Spatial locality a problem; tend to want next sequential word, so not clear if benefit by early res