振荡器和能产生时钟信号的电路设计--毕业论文设计.docVIP

摘 要 随着半导体技术的发展，集成电路芯片以越来越高的性能来满足在越来越广泛领域的应用，高速低耗成为发展的方向和热点。这就对芯片工作所需的时钟信号提出了更高要求。时钟信号产生电路既要能正常工作，产生精准的信号，同时又要适应能耗，芯片面积等限制。 本课题的主要内容是研究振荡器和能产生时钟信号的电路，设计出要求的时钟电路。在设计上具有如下特点：振荡器为芯片提供固定频率的时钟信号，当控制信号为高电平时，高频时钟信号；当控制信号为低电平时，低频时钟信号。 本文首先设计完成了电路的设计，在Dxdesign上绘出电路，完成设计，然后在Hspice中仿真验证，达到预先的设计功能。关键词：时钟信号，电路，振荡器，HspiceABSTRACT With the development of semiconductor technology, integrated circuit chips meet wide range of application areas by the increasingly high performance. High speed and low power consumption become the development direction and hot spots, which put a higher demand about the clock working on the chip. The clock signal generator circuit has to be able to work properly, generating accurate signal, while at the same time to adapt to the limit of energy consumption and chip area. The main content of this subject is the oscillator and a circuit which can generate a clock signal, as well as to present a proper clock signal circuit. The design has following characteristics: the oscillator provides a fixed frequency clock signal to the chip, when the control signal is high, the output is high frequency clock signal; when the control signal is low, the output is low-frequency clock signal. In the thesis, a design of a circuit is presented, and the schematic is drawn by Dxdesign, then complete simulation in Hspice. Finally, the circuit performance will achieve the features of design. Keywords：lock signal, circuit, oscillator, Hspice目 录 第1章 引言 1 1.1 课题背景 1 1.2 振荡器国内外研究现状 2 1.3 振荡器的应用及意义 3 1.4 个人工作和论文安排 3 第2章 振荡器基本原理 4 2.1振荡器基本介绍 4 2.2 反馈理论 4 2.2.1巴克豪森准则 5 2.2.2平衡条件 6 2.2.3稳定条件 7 2.3负阻理论 8 2.3.1起振条件 8 2.3.2平衡条件 9 2.3.3稳定条件 9 2.4常见的振荡器 13 2.4.1环形振荡器 13 2.4.2 LC振荡器 20 2.4.3弛张振荡器 23 第3章 电路设计与实现 34 3.1 设计目标与要求 34 3.2电路设计 34 3.2.1电路功能描述 35 3.2.2 构架分析 35 3.2.3功能特性分析 38 第4章 仿真 40 4.1软件介绍 40 4.1.1 Hspice介绍 40 4.1.2 Viewdraw介绍 41 4.2仿真 41 4.2.1仿真电路图 41 4.2.2仿真结果 45 4.2.2.1 DC特性仿真结果 45 4.2.2.2 AC特性仿真结果 47 4.2.3仿真得到的输入输出信号逻辑关系图 51 第5章 总结及展望 52 参考文献 53 致谢 54 附录 55 外文资料原文