《逻辑信号电平测试器设计》毕业学术论文.docVIP

摘 要 本文介绍了一个逻辑信号电平测试器，它可以方便快捷的测试某一点的电位的高低，通过声音的有无和声音的频率来判定被测电位的电平范围，从而能解决平常对电路中某点的逻辑电平进行测试其高低电平时，采用很不方便的万能表或示波器等仪器仪表的麻烦。该电路主要包括三部分电路：输入电路、逻辑状态识别电路和音响声调产生电路。其主要应用了集成运放的非线性电路特性，开环增益很大，从而可以制作成双线比较器；用555定时器构成的多谐振荡器作为音响产生电路，利用对电容的充放电，得到一定频率的信号。输入的逻辑信号电平大于或小于所设定的高低电平电位，则音响电路发声，如若在高低电平之间，则音响电路不发声。利用这种方式设计电路，计算元器件参数，选择成本合适的器件，确定电路形式并进行仿真实验验证，最后做出符合全部要求的实物。 关键词 逻辑信号；电平测试；高电平；低电平  ABSTRACT A logic signal level tester were introduced in this paper, it can be convenient and quick test point point of high and low, through the voice of the presence of and the frequency of the sound to determine the level of the measured potential range, which can solve the common logic level of some point in the circuit to test the electricity at ordinary times, use very inconvenient the multimeter or oscilloscope, such as instruments and meters. The circuit circuit mainly includes three parts: input circuit, logic circuit state recognition circuit and sound tones. The main application of the nonlinear circuit characteristic of integrated operational amplifier, the open loop gain is very large, which can be made into double comparator; With multivibrator composed of 555 timing circuit as an audio, use of capacitor charging and discharging, and get a certain frequency of the signal. Logic of input signal level is greater than or less than the potential of set high and low level, the sound circuit, if between high and low level, and the sound circuit is not sound. Circuit design, this way is used to calculate components parameters, choosing the best cost components, determine the circuit form and simulation experiment, finally to meet all the requirement of the product. Key words: logic signal; Level test; High level; Low level 目录 摘 要 I ABSTRACT II 第一章 绪论 1 1.1课题研究及其意义 1 1.2国内外研究现状及发展趋势 1 第二章 逻辑电平信号测试系统简介 3 2.1 常用电平介绍 3 2.2测试电路的设计思路 4 2.3测试电路要求: 5 2.4测试电路的原理介绍 5 第三章 测试电路硬件的选择 6 3.1LM339电压比较器芯片介绍 6 3.2 555定时器芯片 10 3.3 555定时器构成的多谐振荡器 11 第四章 整体电路的设计 13 4.1整体电路的设计 13