基于FPGA脉冲信号占空比测量.docVIP

摘要 论文以脉冲信号为研究对象，应用了先进的FPGA技术，设计了一种全新数字的脉冲信号占空比测量系统，通过了仿真、综合和下载的各个程序测试环节，并在实验中得到了良好的应用。 本论文分析了脉冲信号占空比测量器的工作原理与测试过程，然后阐述了FPGA的设计原理以及所设计到底相关芯片，接着对所要应用的硬件语言VHDL方面知识进行了简单地介绍，这些为论文的具体设计部分提供了理论基础。 本系统针对需要测量的脉冲信号，设计出了一种 为整个系统进行模块化设计，并且每个子模块都通过了仿真测试。系统采用了模块化的设计思路，提高系统性能和可扩展性。同时为系统的设计和维护提供了方便。同时系统也采用软件硬件化的设计思路，该设计应用VHDL硬件语言，所使用的软件也是采用了目前应用比较广泛的集中。 FPGA+VHDL+EDA工具构成的数字系统下场集成技术，是本系统设计的核心部分，该门技术具有操作灵活、利用广泛以及价廉等特点。该门技术具有旺盛的生命和广阔的前景，必然推动着整个集成电路产业系统集成的进一步发展。整个系统设计采用了全数字化，使得整个系统运行变得十分可靠，调试也极为方便。作为一种先进技术的应用，论文在很多方面作了新的尝试。 关键词：脉冲信号占空比，现场可编程门阵列，硬件描述语言 Abstract Thesis pulse signal as the research object, the application of advanced FPGA technology to design a new digital pulse signal duty cycle measurement system, through a simulation, synthesis, and download the various aspects of program testing and has been in the experiment good application. This paper analyzes the pulse duty cycle measurement device works with the testing process, and then describes the design of FPGA design principles and the relevant chips in the end, then the hardware on which to apply their knowledge of VHDL language were simply introduced, these have some of the specific design of the paper provides a theoretical basis. The system for pulse signal to be measured, designed a modular design for the entire system and each sub-module through the simulation test. System uses a modular design ideas for the system design and maintenance provided for convenience. Also improve system performance and scalability. System uses a software and hardware of the design ideas, application of the VHDL hardware language that is easy to understand. Software is used widely by the current concentration. FPGA + VHDL + EDA tool end digital systems consisting of integrated technology is the core of the system design, the gate technology with operational flexibility, the use of extensive and inexpensive and so on. The gate technology with a strong and broad prospects of life is bound to promote the integration of the entire integrate