基于vhdl的数字频率计设计论文g6ufuevq.docVIP

基于VHDL的数字频率计设计 摘 要：数字频率计是一种基本的测量仪器。它被广泛应用于航天、电子、测控等领域。它的基本测量原理是让被测信号与标准信号一起通过一个闸门，然后用计数器计数信号脉冲的个数，把标准时间内的计数结果，用锁存器锁存起来，最后用显示译码器译码，结果用LED数码显示管显示出来。 本设计用VHDL语言进行编程，实现了闸门控制信号、多路选择电路、计数电路、位选电路、段选电路等。该设计的特点是无论底层还是顶层文件均用VHDL语言编写，避免了用电路图设计时所引起的毛刺现象，整个频率计设计在一块CPLD芯片上，与用其他方法做成的频率计相比，体积更小，性能更可靠。该设计方案通过了Max+plusⅡ软件仿真。 关键字：VHDL, CPLD , EDA, 数字频率计 The Design of Digital Cymometer Based on VHDL Abstract：The digital cymometer is a kind of basic measuring instrument. It is widely used in such fields as the spaceflight, electron, observing and controlling, etc. Basic measurement of it principle, is it examine signal adopt the gate together with standard signal to let at first, the number of the signal pulse that then count through the counter, latch with the latch the result of counting within standard time, use decipher display finally, number show is it is it come out to show to in charge of with LED result that latch. The design used VHDL language programming, and the gate control signals, multiple choice circuit, counting circuit, the circuit-election, the election of the circuit. The design is characterized by either the bottom or top-level documents were prepared with VHDL language, avoid using circuit design phenomenon caused by Burr, the frequency of chip design in a CPLD, and make use of other methods compared to the frequency of , In a smaller, more reliable performance. The design plan by the Max + plus Ⅱ software simulation. Key words: VHDL，CPLD，EDA, digital cymometer 目录 TOC \o 1-3 \h \u HYPERLINK \l _Toc198274642 摘 要 PAGEREF _Toc198274642 \h I HYPERLINK \l _Toc198274643 Abstract PAGEREF _Toc198274643 \h II HYPERLINK \l _Toc198274644 第1章 前言 PAGEREF _Toc198274644 \h - 1 - HYPERLINK \l _Toc198274645 第2章 方案的提出与选择 PAGEREF _Toc198274645 \h - 3 - HYPERLINK \l _Toc198274646 2.1. 方案一 ：基于可编程逻辑器件的频率计设计 PAGEREF _Toc198274646 \h - 3 - HYPERLINK \l _Toc198274647 2.2. 方案二 ：基于标准逻辑器件的频率计设计 PAGEREF _Toc198274647 \h - 3 - HYPERLINK \l _Toc198274648 2.3 本设计方案的确定与选择 PA