等精度测频设计-毕业(学术)论文设计.docVIP

l l 毕 业 设 计（论 文） 摘 要 频率 是 电 子 技 术领域内的一个基本参数，同时也是一个非常重要的参数。稳定的时钟在高性能电子系统中有着举足轻重的作用，直接决定系统性能的优劣。随着电子技术的发展，测频系统使用时钟的提高，测频技术有了相当大的发展，但不管是何种测频方法，士1个计数误差始终是限制测频精度进一步提高的一个重要因素。本 设计采用等精度频率设计原理和8051软核做微处理器。通过分析士1个计数误差的来源得出了一种新的测频方法:检测被测信号，时基信号的相位，当相位同步时开始计数，相位再次同步时停止计数，通过相位同步来消除计数误差，然后再通过运算得到实际频率的大小。充分利用8051软核简化外围电路及降低系统设计的复杂度。采用VHDL语言，成功的编写出了设计程序，并在Qutus II软件环境中，对编写的VHDL程序进行了仿真，得到了很好的效果。最，给出了较详细的设计方法和完整的程序设计以及调试结果。 关键词:EDA、FPGA、全同步、数字频率计、VHDL语言、8051 ABSTRACT Frequency is a basic parameter of elcetornics field，meanwhile，it’saver important Param ete.Stable clock is very important in high electronics syetem.determining the syetem perfermance directly.With the development of technology of electronics，the frequency measurement System using higher clock，the frequency measurement technology has very nice development .In despite of using all other advanced ftequency measurement methods，the Positive and negativel errors was a very important factor that stop frequency measurement precision improving all through. This design uses the design principle and the frequency of such precision 8051 soft nuclear do microprocessors.Through analyzing the origin of the Positive and negative got a new frequency measurement methods: checkingt measured and standard signal’s Phase，if the Phase is synchronous.then the counters start counting when the signal’s Phase is synchronous again. The counters to stopping working by Phase in一Phase to eliminate counting erors，then getting the real frequency through calculating. Make full use of the 8051 soft IP simplified peripheral circuit and reduce the complexity of the system design. the design of complete digital cymometer was successful using VHDL language, successful writing out design program, and in Qutus II software environment ,and procedures obtained good effect. The detail is presented, the design method and program design and commissioning of full results. Keywords：EDA、FPGA、、Complete ln-phase、DigtaICymomcter、VHDL、8051 目 录 TOC \o 1-3 \h \