数字设计课件 第9章 存储器cpld和fpga.pptVIP

Chapter 9 Memory、CPLD and FPGA 本章只要求存储器中的ROM及其用于组合逻辑电路的设计 memory 9.1 Read-Only Memory (ROM) 1. basic strcture 2. Internal ROM structure 3. Two-dimensional decoding MOS transistors as storage elements 4. commercial ROM types mask-programmable ROM , array connections are programmed during semiconductor manufacture using a mask. very fast. very dense. expensive, 2-4 week turn-around, low power Programmable ROM(PROM), fuses to program once in the field, use PROM programmer, inexpensive EPROM（Erasable PROM）, fuses implemented using floating-gate MOS transistors to program 10k~100k times in the fie