mx25l512中文资料新.pdfVIP

  • 28
  • 0
  • 约10.43万字
  • 约 39页
  • 2018-12-16 发布于湖北
  • 举报
mx25l512中文资料新

元器件交易网 MX25L512 512K-BIT [x 1] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3 • 524,288 x 1 bit structure • 16 Equal Sectors with 4K byte each - Any Sector can be erased individually • Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program operations • Latch-up protected to 100mA from -1V to Vcc +1V PERFORMANCE • High Performance - Fast access time: 85MHz serial clock (15pF + 1TTL Load) and 66MHz serial clock (30pF + 1TTL Load) - Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page) - Fast erase time: 60ms(typ.) and 120ms(max.)/sector (4K-byte per sector) ; 1s(typ.) and 2s(max.)/chip(512Kb) • Low Power Consumption - Low active read current: 12mA(max.) at 85MHz, 8mA(max.) at 66MHz and 4mA(max.) at 33MHz - Low active programming current: 15mA (max.) - Low active erase current: 15mA (max.) - Low standby current: 10uA (max.) - Deep power-down mode 1uA (typical) • Minimum 100,000 erase/program cycles SOFTWARE FEATURES • Input Data Format - 1-byte Command code • Block Lock protection - The BP0~BP1 status bit defines the size of the area to be software protected against Program and Erase in- structions. • Auto Erase and Auto Program Algorithm - Automatically erases and verifies data

文档评论(0)

1亿VIP精品文档

相关文档