基于fpga的交流伺服系统电流环设计-控制理论与控制工程专业论文.docxVIP

基于fpga的交流伺服系统电流环设计-控制理论与控制工程专业论文.docx

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基于fpga的交流伺服系统电流环设计-控制理论与控制工程专业论文

华 华 中 科 技 大 学 硕 士 学 位 论 文 II II Abstract With the continuous progress of the field programmable gate array (FPGA) technology, AC servo drive technology based on FPGA gets more and more attention gradually by high running speed, flexible interface, good portability, et al. Based on analysis of the research literature, the thesis focuses on the hardware design method of the current loop control of ac servo system based on FPGA, aiming to improve the current loop control performance of the servo system which restricts the response of the servo system seriously. Firstly, based on the mathematical model of the permanent magnet synchronous motor and the basic principles of vector control, the current decoupling control method is analyzed in the thesis, a complex vector current regulator stategy is designed to improve the application performance. Simulation works are done to prove it in MATLAB / SIMULINK environment. Then, the characteristic of structure of Cyclone II series FPGA is discussed, and the hardware design of FPGA-based servo system, especially the power supply circuit and configuration circuit of the FPGA are given to adapt requirment. Through description of the FPGA development process based on Quartus II software, a detailed design method and idea of each module in the FPGA-based AC servo system are introduced, which include the timing scheduling module, the vector transformation module, the current regulator module, the space vector PWM module, current sensor interface module, encoder feedback signal processing module, et al. And some timing simulation results are given. Simultaneously, the method of multi-axis synchronous motor current loop control scheme is analyzed in the thesis. A key scheme of timing scheduling based on pipeline structure in the multi-axis synchronous motor current loop control was described in detail, which consumes short computation time without increasing the hardware resources of FPGA. Finally, the experiment result of the FPGA-bas

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