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ECE 313 Fall 2006 Lecture 17 - Pipelining 1 计算机组成与结构 Lecture 17 – 流水线处理器 Reading: 6.1-6.2 Roadmap for the term: major topics Overview / Abstractions and Technology Performance Instruction sets Logic arithmetic Processor Implementation Single-cycle implemenatation Multicycle implementation Pipelined Implementation 3 Memory systems Input/Output Pipelining Outline Introduction Defining Pipelining 3 Pipelining Instructions Hazards 冒险 Pipelined Processor Design Datapath Control Advanced Pipelining Superscalar Dynamic Pipelining Examples What is Pipelining? 一种加速指令执行的方式 Key idea: 重叠多条指令的执行 类似的实例: 洗衣服 1. Run load through washer-洗衣 2. Run load through dryer-烘干 3. Fold clothes-折叠衣服 4. Put away clothes-放好衣服 5. Go to 1 观察:只要完成第一步就可以立即开始一个新的任务! The Laundry Analogy Ann, Brian, Cathy, Dave each have one load of clothes to wash, dry, and fold Washer takes 30 minutes Dryer takes 30 minutes “Folder” takes 30 minutes 整理衣服放入抽屉花费30分钟 如果顺序完成这个过程... Time Required: 8 hours for 4 loads To Pipeline, We Overlap Tasks Time Required: 3.5 Hours for 4 Loads Latency remains 2 hours Throughput improves by factor of 2.3 (decreases for more loads) Pipelining a Digital System Key idea: 将大的计算任务分为小的片 使用流水线寄存器将各片分开Separate each piece with a pipeline register 流水线化数字系统 Why do this? Because its faster for repeated computations 关于流水线的解释 流水线提高了吞吐量,但是不能降低延迟 Answer available every 200ps, BUT A single computation still takes 1ns Limitations: Computations must be divisible into stage size Pipeline registers add overhead Pipelining Outline Introduction Defining Pipelining Pipelining Instructions 3 Hazards Pipelined Processor Design Datapath Control Advanced Pipelining Superscalar Dynamic Pipelining Examples Pipelining a Processor Recall the 5 steps in instruction execution: 1. Instruction Fetch 2. Instruction Decode and Register Read 3. Execution operation or calculate address 4. Memory access 5. Write result into register Review: Single-Cycle Processor All 5 steps done in a single clock cycle 每一步需
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