基于XY路由算法的片上网络路由器的验证-集成电路工程专业论文.docxVIP

哈尔滨工业大学工程硕士学位论文 哈尔滨工业大学工程硕士学位论文 - - II - Abstract In modern IC design, function verification takes 50%~80% time of the design cycle which will be even more as the scale of design grows. Function verification has become the largest bottleneck. The usual method of function verification is simulation-based dynamic verification. However, the traditional simulation-based verification suffers from some obvious deficiencies: lower observe ability and controllability, difficult debugging, lower reusability of verification environment and lower automation of simulation process. In allusion to the shortage of current verification process, this thesis major researches the verification realization based on assertion. Assertion-based- verification is a new trends for verification methodology . It has the following advantages: the ability to increase the validation process can be observed and can be controlled; in the design cycle can be found earlier design defects, to promote the wrong diagnosis; can reduce the redundant simulation cycle, reducing design errors not found in the risk; assertion module can be integrated with the design of a good module to enhance the efficiency of verification. With the example of Network on Chip router based XY routing algorithm in this thesis, an assertion-based-verification method based on SystemVerilog Assertion is discussed. According to the features of SVA, a layer-based testbench is established and combined with the SAV, the process of the verification based SVA is discussed. Refers to the design and implement specifications of the XY router, according to design criterion and implement criterion , adopts a down-top method to carry out the verification for XY router. According to design criterion, pick-ups function properties, then turn properties into SVA sentences, inserts them into RTL code, execute the function verification for inside modules of XY router. Keywords：NoC, SVA, Router, Function Verification - - PAGE IV - 目 录 摘 要 I HYPER