基于通用交换接口(CSIX)的交换机SOC设计-CORE.PDFVIP

35 8 V o l. 35, . 8 2008 8 A pp lied Science and T echno logy A ug. 2008 : 1009- 671X 2008) 08- 0043- 05 CSIX) SOC 郭宝英, 李晓潮, 郭东辉 厦门大学 电子工程系 福建 厦门 361005) : CSIX ) . SO C) , C rossbar, CSIX . , HDL , FP GA , 8 8 32b its SOC . , FPGA SOC Gbp s. : Cro ssbar; CSIXL 1; FPGA; : TN 915 : A A design of sw itch chip using CSIX interface protocol GUO Baoying , L I X iaoch ao, GUO Donghu i D epartment o f E lectron ic Eng ineering, X iam en U n iversity, X iam en 361005, Ch ina) Abs tract: The Comm on Sw itch Interface CS IX) specificat ion is a protoco lw ide ly u sed for comm on sw itch inter face design. Th is article proposed a schem e for expandab le sw itch system chip SOC ) design. T he design takes C rossbar to rea lize nonb lock ing data exchange in sw itch ch ip design. In th is artic le, w e m ade a deta iled introduc t ion to the design o fHDL language design rea lization schem e in transce iverM odule. By using FPGA, w e rea lize the w ho le functions of the m odule in the system, comp leting an SOC ch ip w ith 8 8 32bits data line interface. T est on SOC ch ip show s that, u sing the FPGA can reach the data exchange ab ility o f a single Gbp s ch ip. K eyword s: crossbar sw itch fabric; CSIX L 1; FPGA; transceiver m odu le SOC system onch ip) , NP ) F ab . ric) [ 1] 1 SOC 芯片设计的结构原理 . CSIX Comm on sw itch interface) 1 CS IX [ 2] , CSIX _L 1, , , ATMIPMPLSE thernet