ADC选型与基本原理(TI)课件.pptVIP

ADC selection and Basic principles ;采样过程是通过模拟电子开关 S实现的。模拟电子开关每隔一定的时间间隔闭合次，当一个连续的模拟信号通这个电子开关时，就会转换若干个离散的脉冲信号。;ui;Basic sampled-data systems ;1. Sampling and keeping Sampling Theorem (Nyquist‘s Law):a signal with a bandwidth f must be sampled at a rate 2 , or information about the signal will be lost. If the sampling frequency less than twice the bandwidth of the analog signal, aliasing phenomenon appears. usually, =(3~5) ;Quantization and coding 1. Quantization: Digital signal, not only in time is discrete, but also numerical value of the change is not continuous. That the size of any digital is only a certain specified minimum number of integer units. Therefore, before A / D conversion must also be sampled voltage into the smallest integral multiple of the number of units, the conversion process is known as quantitative. ;2. coding: The quantized signal with the corresponding quantization level of a binary code to represent the process called encoding. Quantify the voltage difference between the two is called quantization interval S, the median quantitative voltage more finer quantization level, S values will become. ;Eg: To 0 ? 1V analog voltage for the three binary encoding. ;Classification ;;2. Σ-Δ(Delta-Sigma)调制型 ADC： Σ-Δ型AD由积分器、比较器、1位DA转换器和数字滤波器等组成。原理上近似于积分型，将输入电压转换成时间(脉冲宽度)信号，用数字滤波器处理后得到数字值。电路的数字部分基本上容易单片化，因此容易做到高分辨率。主要用于音频和测量。 ;;3. 右图为12位流水线ADC的结构图。输入Vin首先被采样/保持（SH）电路所采样，同时第一级的闪速ADC把它量化为3位，此3位输出送给一3位DAC（具有12位精度），输入信号减去此DAC的输出，放大4倍送给下一级（第二级），继续重复上述过程，每级提供3位，直到最后一级4位闪ADC。对应; 流水线ADC结构适合于几Msps到100Msps采样速率，其复杂性随分辨率的增加只是线性（而不是指数）增加，具有高速、高精度和低功耗特性，适用于各种场合，特别是数字通讯领域，在这些领域中转换器的动态性能经常比微分非线性(DNL)和积分非线性等传统的ADC特性更重要。在大多数的应用中，流水线ADC的数据延迟都无关紧要。 ;ADC main key specifications ;3. Absolute Accuracy It Means the ADC converted from digital to analog represents the actual difference between analog input values, usually represented by digital simulation of the lowest input Ulsb（最低有效位电压） to measure. 4. SFDR (Spurious Free Dynamic range )