基于bandgap版图设计毕业论文.docx

摘要 摘 要 近年来随着 IC 设计要求的不断发展，集成电路版图设计是实现集成电路制造所必不可少的设计环节，它不仅关系到集成电路的功能是否正确，而且也会极大 程度地影响集成电路的性能、成本。而集成电路中的 bandgap 可以在温度和电压不稳定的环境中保持稳定的参考电压， 被广泛运用于比较器、 A/D 转换器等模拟电路及数模混合信号集成电路中，其性能直接影响整个系统的精度和性能。因此， bandgap 版图设计的研究非常有意义。 本文基于 Cadence 版图设计软件平台，采用 XFAB0.6μm CMOS工艺设计。设计的版图元件包括 PMOS、 NMOS、 PNP三极管、电阻、电容。其中对差分放大器、电流镜、电阻等重要元件采用了匹配和对称的设计方法，考虑电气特性的版图设 计技术；为防止闩锁效应， 本设计还运用了保护环保护整个电路， 提高了 bandgap 电路的可靠性。 本设计对最终设计出的版图使用 calibre 验证工具进行 LVS 和 DRC验证，并顺利通过验证。 关键字：版图；带隙基准电压源； Cadence；匹配；验证 I Abstract ABSTRACT In recent years, along with IC design request of continuously development, IC layout are essential to achieve the design of integrated circuit manufacturing sectors, it is not only related to the ICs functions are correct, but also great extent affect IC performance and cost.But bandgap reference voltage of integrated circuit can keep stability in the unsteady environment of the temperature and the electric voltage of reference electric voltage, used extensively in comparison machine, A/D conversion machine etc. analog electric circuit and some mixture signal integrated circuit. Its function is directly influence the whole accuracy and function of system. Therefore, the research which take the layout design of the bandgap reference voltage is very meaningful. This text ,according to the design software of the Cadence about layout design, adopts XFAB0.6μm CMOS of design rule.The component of layout design include PMOS, NMOS, PNP, electric resistance, electric capacity. To the OP、current and resistance which are importance components adopt layout design technique of consideration electricity characteristic; To reduce latch-up, this design still uses guard ring to protect the whole electric circuit, improving the credibility of bandgap reference voltage. In the end, this design carried LVS and DRC of verification to the landscape used calibre verification tool that finally designs and passed a verification smoothly. Key Words: Layout; Bandgap reference voltage; Cadence; matching; Symm