高性能处理器.pptVIP

Control Hazard Solution （3）:软件循环展开减少分支指令 例：向量的每个元素加常数 For (j=1; j=1000; j++) x[j]=x[j]+s; 编译： 整数寄存器R1：循环计数器，初值为向量中最高端地址元素的地址 浮点寄存器F2：保存常数s 1 Loop:LD F0,0(R1) ;F0=vector element 2 ADD F4,F0,F2 ;add scalar in F2 3 SD 0(R1),F4 ;store result 4 SUBI R1,R1,8 ;decrement pointer 8B (DW) 5 BNEZ R1,Loop ;branch R1!=zero Scalar vs. Superscalar vs. VLIW single-threaded : (a) scalar (b)superscalar (c) VLIW Single issue vs. multiple issue processor von Neumann processor(Scalar processor) a single program counter really:IPC ≤1 ILP processor(Superscalar, VILW) a single program counter really:IPC ≤2 (when 4~8 issue) IMT vs. BMT multi-threaded : (a) cycle-by-cycle interleaving superscalar（ Fine-Grained Multithreading ） (b) block interleaving superscalar（ Course-Grained Multithreading ） (c) cycle-by-cycle interleaving VLIW（ Fine-Grained Multithreading ） Global Branch Prediction Scheme: 设计思想 例：考虑下面的代码段： if (aa == 2) // branch b1 aa =0; if (bb == 2) // branch b2 bb =0; if (aa != bb) { // branch b3 …… } 这段代码由编译器转换为以下汇编程序（假定aa和bb分别分配为R1和R2）： SUBI R3，R1，#2 BNEZ R3，L1 ；branch b1 (aa != 2) , taken ADD R1, R0, R0 ；aa == 0, not taken L1: SUBI R3，R2，#2 BNEZ R3，L2 ；branch b2 (bb != 2) , taken ADD R2, R0, R0 ；bb == 0, not taken L2:SUB R3，R1，R2 ；R3=aa-bb BEQZ R3，L3 ；branch b3 (aa = = bb) , taken 每次循环都有数据相关/控制相关引起的停顿 每次循环需要 9 clocks Rewrite code to minimize stalls? 静态调度的例子 每次循环需要 6 clocks Unroll loop (循环展开) 4 times code to make faster? 循环展开+寄存器重命名（Register Renaming）的例子 寄存器重命名的目的是避免引入新的WAW和WAR数据相关 循环展开+寄存器重命名（Register Renaming）的例子 Rewrite loop to minimize stalls? 静态调度减少停顿,减少分支的例子 What assumptions made when moved code? OK to move store past SUBI even though changes register OK to move loads before stores: get right data? When is it safe for compiler to do such changes? Global Branch Prediction Scheme: 设计思想 Global Branch Prediction Scheme: 设计思想 * (a) Time (process cycles) (a) T i m e ( p r o c e s s o r