ACM的论文写作格式标准.docVIP

PAGE ACM Word Template for SIG Site 1st Author 1st authors affiliation1st line of address2nd line of addressTelephone number, incl. country code 1st authors E-mail address 2nd Author 2nd authors affiliation1st line of address2nd line of addressTelephone number, incl. country code 2nd E-mail 3rd Author 3rd authors affiliation1st line of address2nd line of addressTelephone number, incl. country code 3rd E-mail ABSTRACT As network speed continues to grow, new challenges of network processing is emerging. In this paper we first studied the progress of network processing from a hardware perspective and showed that I/O and memory systems become the main bottlenecks of performance promotion. Basing on the analysis, we get the conclusion that conventional solutions for reducing I/O and memory accessing latencies are insufficient for addressing the problems. Motivated by the studies, we proposed an improved DCA combined with INIC solution which has creations in optimized architectures, innovative I/O data transferring schemes and improved cache policies. Experimental results show that our solution reduces 52.3% and 14.3% cycles on average for receiving and transmitting respectively. Also I/O and memory traffics are significantly decreased. Moreover, an investigation to the behaviors of I/O and cache systems for network processing is performed. And some conclusions about the DCA method are also presented. Keywords Keywords are your own designated keywords. INTRODUCTION Recently, many researchers found that I/O system becomes the bottleneck of network performance promotion in modern computer systems REF _Ref313573178 \r \h [1] REF _Ref313573180 \r \h [2] REF _Ref313573181 \r \h [3]. Aim to support computing intensive applications, conventional I/O system has obvious disadvantages for fast network processing in which bulk data transfer is performed. The lack of locality support and high latency are the two main problems for conventional I/O syste