phy芯片layout注意事项.docVIP

AN18.6 SMSC Ethernet Physical Layer Layout Guidelines 1 Introduction SMSC Ethernet products are highly-integrated devices designed for 10 or 100 Mbps Ethernet systems. They are based on IEEE 10BASE-T and 100BASE-TX standards. The IEEE 802.3-2005 standard for 100BASE-TX defines networking over two pairs of Category 5 unshielded twisted pair cable or Type 1 shielded twisted pair cable. This application note is intended to assist customers in designing a PCB using SMSC’s Ethernet products to interface with an Ethernet network. This document provides recommendations regarding the PCB layout. This is a critical component in maintaining signal integrity, and reducing EMI. 1.1 Audience This application note is written for a reader that is familiar with Ethernet hardware design. 1.2 Overview The following recommendations for the printed circuit board layout with SMSC parts are not the only way to layout SMSC Ethernet QFP/QFN parts. Every board designer will have a preference. Complexity, board space, number and types of devices will dictate routing and placement strategies. For example, the PCB described in this application note has components on both sides of the board. A four layer board could be realized with components on one side only. The datasheets and reference schematics for SMSC Ethernet products should be used as a reference for this layout design guideline. 2 General Design Guidelines The Evaluation Board (EVB) schematics and gerber files are available on the SMSC web site. These can be used as a reference for component placement and routing. Good engineering practices should be followed with respect to unused inputs by terminating them with pull-up or pull-down resistors, unless the datasheet, design guide or reference schematic indicates otherwise. Do not attach pull-up or pull-down resistors to any pins identified as reserved (unless explicitly stated in the datasheet). These devices may have special test modes that could be entered inadvertently.