(含常数的指令).pptVIP

CS61C L6 Machine Rep Chap 2.4 - Instruction Representation Jen-Chang Liu, Spring 2006 Adapted from /~cs61c/ Review Instructions: Arithmetic: add, addi, sub Memory access: lw, sw Branch: beq, bne, j comparison: slt, slti, sltu, sltiu Review of Lab#2: memory access “Computer Organization” Hierarchy of Programming Languages Q: How do we represent instructions in machine? Overview Instructions as Numbers R-Format I-Format Branch instruction: addressing mode J-Format Instructions as Numbers (1/2) Currently all data we work with is in words (32-bit blocks): Each register is a word. lw and sw both access memory one word at a time. So how do we represent instructions? Remember: Computer only understands 1s and 0s, so “add $t0,$0,$0” is meaningless. MIPS wants simplicity: since data is in words, make instructions be words... Instructions as Numbers (2/2) One word is 32 bits, so divide instruction word into “fields”. Each field tells computer something about instruction. We could define different fields for each instruction, but MIPS is based on simplicity, so define 3 basic types of instruction formats: R-format I-format J-format Instruction Formats J-format: used for j and jal I-format: used for instructions with immediates (含常數的指令) lw and sw (since the offset counts as an immediate) the branches (beq and bne) (but not the shift instructions; later) R-format: used for all other instructions Registers as operands Overview Instructions as Numbers R-Format I-Format Branch instruction: addressing mode J-Format R-Format Instructions (1/5) Define “fields” of the following number of bits each: R-Format Instructions (2/5) What do these field integer values tell us? opcode: partially specifies what instruction it is (Note: This number is equal to 0 for all R-Format instructions.) funct: combined with opcode, this number exactly specifies the instruction Question: Why aren’t opcode and funct a single 12-bit field? Answer: We’ll answer this later. R-Format Instructions (3/5)