GaN FETs 转换器的Vgs瞬态容限.pdfVIP

Application Note 0006 VGS Transient Tolerance of Transphorm GaN FETs Abstract This document provides a guideline for allowable transient voltages between gate and source pins . Table of Contents Abstract 1 Introduction 2 Simple analysis 2 Origin of VGS transients 2 Packages with internal ferrite beads 4 Avoiding problems through careful PCB layout 5 May 1, 2017 © 2017 Transphorm Inc. Subject to change without notice. an0006.1 1 Application Note 0006 Introduction The absolute maximum rating provided in Transphorm data sheets for VGSS is ±18V. This is the maximum voltage which the device is guaranteed to sustain between gate and source without failure. Because the package adds inductance in series with the gate; however, transient voltages may appear on the gate pin which exceed VGSS, but cause no damage because the voltage actually present on the die does not exceed VGSS. This Application Note provides a guideline for allowable transient voltages between gate and source pins. Simple analysis A very simple analysis of the input loop is shown in Figure 1. The package inductance in series with the gate, LGP, has a value of about 3nH for the TO-220 package. From the data sheets, Ciss has a minimum value of 710pF. Using these values, the frequency at which VGS/VGS- EXT = 0.5 is ~190MHz. Therefore, for frequencies above 200M Hz, the amplitude of the actual internal voltage on VGS is less than 50% of the voltage measured on the package pins. By this analysis, any ringing or transient voltage with a period of less than 5ns can have an a