讲稿ni官方培训7.high-throughput labview fpga architectures.pptxVIP

High-Throughput LabVIEW FPGA ArchitecturesConcept to implementation design flow4-wire protocolDetermining FIFO sizesBest practices for large designs OutlineConcept to Implementation Design FlowThroughput RequirementsStorage RequirementsClocking ArchitectureCommunicationCase study: Inline Multi-Record Average FFTFollow the “Concept to Implementation Design Flow” to complete a design from start to finishBest Practices OutlineConcept to implementation processThroughput requirementsStorage requirementsClocking architectureCommunication policies – FIFO, handshake, register, wireSingle vs. multiple elementData storageDestructive vs. non-destructive accessesAccess confirmationCase study: multi-record averagerExplore trigger optionsExplore record lengthsOtherPiecewise design validation -Resource wires for memory and FIFOs to minimize redefinition Design patterns – Anything useful from Kosta’s NIWeek presentationDynamic wire on host ThroughputThroughput period and duty cycleInstantaneo usAggregateStorageSpace needed – FIFO depthAccess policies – LatencyClocking ArchitecturePartition design into clock domainsCommunication PoliciesSingle vs. multiple elementData storageDestructive vs. non- destructive accessesAccess confirmationConcept to Implementation Design FlowStorage space requirements and access policies affects throughput needsRequired clocking architecture affects throughput and storage requirementsMoving subVIs between different clock domains affects what communication policy is requiredAppropriate portions of the FPGA design flow should be considered during the decision making process ThroughputThe amount of data processed in Bytes/SecondDataInData OutProcessing Throughput FactorsBlock Size: Maximum number of consecutive samplesHow long will the hose be on at a time?Duty Cycle: Percentage of time source is producing dataHow frequently will the hose be on? Percentage of hose-on/hose- off timeInstantaneous BW: Throughput when data source is onAt what rate is da