机器学习辅助微架构功耗建模和设计空间探索综述.pdfVIP

机器学习辅助微架构功耗建模和设计空间探索综述

MachineLearningforMicroarchitecturePowerModelingandDesignSpace

Exploration：ASurvey

AbstractMicroarchitecture

design

is

a

key

stage

of

processor

development.

It

is

at

the

upper

level

of

the

entire

design

flow

and

directly

affects

core

metrics

such

as

performance,

power

consumption,

and

cost.

Over

the

past

few

decades,

new

microarchitecture

solutions,

coupled

with

advances

in

semiconductor

manufacturing,

have

enabled

newer

generations

of

processors

to

achieve

higher

performance,

lower

power

consumption

and

cost.

However,

as

chip

design

enters

the

post-Moore

era,

the

dividends

from

the

evolution

of

semiconductor

technology

are

increasingly

limited,

and

power

consumption

has

become

a

major

challenge

for

energy-efficient

processor

design.

Meanwhile,

modern

processors

are

becoming

more

complex

in

architecture

and

the

design

space

is

larger,

requiring

designers

to

make

accurate

design

metrics

tradeoffs

to

achieve

the

most

desirable

microarchitecture

design.

Moreover,

the

existing

stage-by-stage

decomposition

of

the

development

and

validation

flow

is

extremely

lengthy

and

time-consuming,

and

it

is

difficult

to

achieve

global

energy

efficiency

optimization.

Therefore,

how

to

perform

accurate

and

efficient

power

estimation

and

design

space

exploration

at

the

microarchitecture

design

stage

becomes

a

key

issue.

To

tackle

these

challenges,

machine

learning

has

been

introduced

into

the

microarchitecture

design

process,

providing

efficient

and

accurate

solutions

for

microarchitecture

modeling

and

optimization.

We

firstly

introduce

the

main

design

flow

of

processors,

microarchitecture

design

and

its

major

challenges,

then

amplify

machine

learning-assisted

integrated

circuit

design,

which

focuses

on

research

advances

in

the

use

of

machine

learning

techniques

to

assist

microarchitecture

power

modeling

and

design

space

exploration,

and

finally

conclud