linx FP高性能DSP设计与System Genera课程大纲.pptxVIP

ThismaterialexemptperDepartmentofCommercelicenseexceptionTSU

DSPDesignFlow

SystemGeneratorforDSP

CourseAgenda

ObjectivesIdentifyXilinxFPGAfeaturesthatlendtohigh-performanceDSPdesignDescribetheSystemGeneratordesignflowUnderstandthebasicsofSimulinkListvariousXilinxblocksavailableforbasicdesigncaptureInterfaceSystemgeneratordesignswithSimulinksourcesandsinksIdentifythehigh-levelblocksavailableforFIRdesignsAddcontrollogictoaSystemGeneratorDesignDesignamultiple-clock-basedSystemGeneratorsystemPerformhardware-in-the-loopandimproveproductivityAftercompletingthiscourse,youwillbeableto:CourseIntroduction2

DayoneAgendaFPGAsforDSPIntroductiontoSystemGeneratorSimulinkBasicsLab1:UsingSimulinkBasicXilinxDesignCaptureLab2:GettingStartedwithXilinxSystemGeneratorSignalRoutingLab3:SignalRoutingCourseIntroduction3

DayTwoAgendaImplementingSystemControlLab4:ImplementingSystemControlMulti-RateSystemsLab5:DesigningaMAC-BasedFIRFilterDesignLab6:DesigningaFIRFilterUsingtheDAFIRBlockCourseIntroduction4

PrerequisitesFundamentalDSPknowledge(ie.FIRfilters)DigitaldesignandFPGAknowledgeBasicunderstandingoftheMatlabtoolsCourseIntroduction5

PlatformSupportISE12.2SystemGenerator12.2MatlabR2009a,R2009bXilinxUniversityboard*XUPV5EvaluationPlatformSpartan3EStarterkitSupportedOperatingSystemsWindowsXP(SP2)(32/64Bit)WindowsVistaBusiness(32/64Bit)RedHatEnterpriseLinux4(32/64Bit)SUSELinuxEnterprise(32/64Bit)CourseIntroduction6*Requiresplugintoperformhardwareintheloopverification