简易数字存储示波器设计.doc

简易数字存储示波器设计 【摘要】：该简易数字存储示波器的设计是介绍基于FPGA高速数据实时采集与存储、显示技术，采用FPGA中的A/D采样控制器负责对A/D模拟信号的采样控制，并将A/D转换好的数据送到FPGA的内部RAM中存储；RAM的地址信号由地址发生计数器产生。当完成1至数个周期的被测信号的采样后，在地址发生计数器的地址扫描下，将存于RAM中的数据通过外部的D/A进入示波器的Y端；与此同时，地址发生计数器的地址信号分配后通过另一个D/A构成锯齿波信号，进入示波器的X端。从而实现数字存储示波器的功能。 本设计的ADC0809芯片作为高速信号的A/D转换，SRAM6264存储器作为采样后数据的存储，DAC0832芯片作为信号的 D/A转换。程序设计采用超高速硬件描述语言VHDL描述，对其A/D转换、A/D采样控制器及数据的存储、数字输出进行编程、仿真，完成硬件和软件的设计，以及实验样机的部分调试。 关键词：数字存储示波器，，RAM6264存储器 Abstract: The simple design of digital storage oscilloscope is to introduce high-speed FPGA-based real-time data acquisition and storage, display technology, the use of FPGA in the A / D sampling controller is responsible for A / D analog signal to control the sampling and A / D conversion to the good data in the FPGA is internal RAM memory; RAM address signal generated by the address counter. Upon the completion of cycle 1 to a few samples of the measured signal, the address counter in the address scan, will keep the data in RAM through the external D / A into the scope of the Y-side; At the same time, address counter After the allocation of the address signal through a D / A constitute a sawtooth signal, the X-side into the oscilloscope. In order to achieve the functions of digital storage oscilloscope. The design of the chip as a high-speed signal ADC0809 the A / D converter, SRAM6264 memory for data storage after sampling, DAC0832 chip as a signal of D / A conversion. Programming using ultra-high-speed hardware description language VHDL description of its A / D conversion, A / D sampling controller and data storage, digital output programming, simulation, the completion of the design of hardware and software, as well as some of the experimental prototype debugging . Key words: digital storage oscilloscope, FPGA, ADC0809, DAC0832, SRAM6264 memory 目录 【摘要】 1 【Abstract】： 1 引言 2 1．数字存储示波器的现状及应用 3 2. 系统设计 3 2.1设计任务及要求 3 2.2 设计思路 5 2.3 整体设计方案 5 2.4 指标计算 6 3. 单元电路设计 7 3.1 输入电路设计 7 3.2 触发电路 8 3.3 控制器的设计 9 3.3.1 采样控制器设计 9 3.3.2 存储器控制设计 1