基于嵌入式电子闹钟课程设计01.docVIP

嵌入式系统综合实验 题 目 基于嵌入式的数字闹钟系统设计 学生姓名 秦乙 学 号 20071309087 学 院 电子与信息工程学院 专 业 信息工程 二Ｏ一Ｏ 年 十二 月 二十七 日 目 录 论文标题 错误！未定义书签。 摘要和关键词 错误！未定义书签。 1 绪论 2 1.1 在信息产业中EDA产生的影响 2 1.2 中国国内EDA发展情况 2 2 FPGA简介 2 2.1 FPGA概述 2 2.2 FPGA基本结构 3 2.3 FPGA编程原理 3 3 设计的总体方案 4 3.1流程图 4 3.2模块组成 4 3.3数字闹钟工作原理 4 4设计的详细原理 5 4.1主要模块 5 4.2功能概述 5 5设计的步骤和过程 6 5.1计时模块 6 5.2校时模块 7 5.3设定闹钟模块 8 5.4显示模块设计 9 5.5蜂鸣器模块设计 错误！未定义书签。2 6设计的仿真和结果 错误！未定义书签。2 7总结 错误！未定义书签。5 参考文献 错误！未定义书签。5 基于嵌入式的数字闹钟系统设计 秦乙 南京信息工程大学学院系，南京 210044摘要：关键词：数字闹钟；EDA；PGA；VHDL； he Design of Digital Clock System on FPGA QinYi Dept. Information Engineering, Nanjing University of Information Science Technology, 210044 ABSTRACT Along with the development of society, science and technology, human beings that time, from view the sun, until now, electric clock pendulum clocks are continuously research and innovation. In order to make the observation time at the same time, can understand other and human closely related information, such as temperature, week, dates, electronic digital clock was born, it sets the time, date, weeks and temperature functions in one, which makes it very convenient, direct display, functional diversity, simple circuit, and many other advantages, conform to the trend of the development of electronic instruments, and has a broad market prospect. EDA technology is dependent on powerful computers in the EDA software platform, with VHDL VHDL for system logic describing means complete design documents, automatically logic optimization and simulation test until realize the set electronic circuit system function. This paper introduces the design based on VHDL VHDL multi-function digital alarm clock of thinking and skills. In Quartus 11 development environments compile and simulation the design process, and then the operation status of debugging validation procedures. The simulation and verification results s