外文翻译原文--从VHDL-AMS来谈可综合的模数转换器的发展.pdfVIP

International Journal of Electronics Vol. 95, No. 9, September 2008, 891902 Proposal of Synthesizable analogue-to-digital converters from VHDL-AMS G. Doménech-Asensi* and J. Garrigós-Guerrero Departamento de Electrónica, Tecnologı´a de Computadoras y Proyectos, Universidad Politécnica de Cartagena, Cartagena, 30202, Spain (Received 9 June 2006; final version received 30 June 2008) In this article, a procedure to describe synthesisable n-bits analogue-to-digital converters (ADC) using VHDL-AMS is presented. The aim is to propose specifications for reusable code generation which makes designers’ tasks easier, shows clearly the underlying hardware structures, and is easily synthesisable by CAD-EDA tools. Two different architectures of ADC have been developed in order to show the guidelines for VHDL-AMS descriptions: a flash ADC and a serial ADC. Both descriptions meet the aforementioned conditions. In order to validate the synthesis methodology we have adapted a CAD-EDA tool specifically devoted to reconfigurable technology synthesis. We have synthesised a flash converter on a combination of FPGA and FPAA and the results have been measured in real devices. Keywords: VHDL; VHDL-AMS; electronic design automation; analogue digital converter; FPGA; FPAA 1. Introduction Nowadays the microelectronics market is characterised by an increasing complexity and integration, in particular in the field of application-specific integrated circuits (ASICs). According to Gielen and Rutenbar (2000), the mixed-signal IC market has grown from 15 to 20% per year since the early 1990s. However, t