基于ADV212的JPEG2000静态图像压缩系统设计.pdfVIP

第32 卷 第3 期 电 子 器 件 V ol. 32 No. 3 2009 年6 月 Chinese Journal Of Electron Devices Jun. 2009 The Design of JPEG2000 Still Image Compression System Based on ADV212 1, 2 1* 1 1 L I U Yong z heng , L I UX uebin , H UBing liang , D UA N X iaof eng 1. X ian Inst it ute of Op tics and P ecision M echanics of CA S , X ian 710119, China; 2. G ad uate S ch ool of the Chine se A cad emy of S ciences , B eij ing 100039, China A stract:This paper researched the JPEG2000 Standard and its singlechip hardware implement AD 212 , and analyses the architecture and operation principleof AD 212.T hen,a design of hardware system of Still Image Compression based on AD 212 and FPGA is proposed, in which USB is used to input and output image data, FPGA is used to control all the timing signals and to organize the style of code stream, AD 212 is used to implement discrete wavelet transform and to pack the compressed code stream. Finally, we use this system to compress international standard image lena. bmp, experimental results reveals that the system can work well and can be used to real application of still image compression. Key words: image compression;JPEG2000;AD 212;FPGA EEACC:6140C ADV212 JPEG2000 1, 2 1* 1 1 刘永征 , 刘学斌 , 胡炳樑 , 段晓峰 1. , 710119;2. ,100039 :JPEG2000 AD 212,AD 212 , AD 212 Field Programmable Gate Array(FPGA) , Universal Serial Bus( USB) , FPGA ,AD 212 ,,, :; JPEG2000; AD 212;FPGA :TN919. 81;TP335. 3 :A 2009 , JPEG , ,JPEG2000 , JPEG2000 ( ISO/ AD 212 ADI 2006 IEC154441 ) JPEG2000 JPEG2000EBCOT ( Embedded , SRAM [ 1] Block Codi